(a) Field of the Invention
The present invention relates to a semiconductor device including dummy features for planarizing the surface of a semiconductor substrate having an isolation film for insulation and isolation between a plurality of elements and a method for manufacturing the same.
(b) Description of Related Art
With the increase in density, functionality and operation speed of semiconductor integrated circuit devices in recent years, an isolation technique such as a trench isolation (STI: shallow trench isolation) technique is becoming mainstream in place of LOCOS (local oxidation of silicon) isolation technique. If the trench isolation technique is used for isolation between elements, the distance between the elements can be made smaller than that between the elements made by the conventional LOCOS technique. However, due to variation in pattern density, surface undulation called dishing occurs in a planarization process that is required to apply the trench isolation technique. For the purpose of correcting the dishing that degrades flatness of a planarized surface, for example, Japanese Unexamined Patent Publication No. HEI 9-107028 proposes a technique for forming so-called dummy features which do not function as active regions in substrate regions where the pattern density is relatively low.
However, as the distance between the elements becomes smaller with the progress in miniaturization of the semiconductor integrated circuit devices, the semiconductor substrate is warped or stressed depending on the distance between the elements or the feature densities of the dummy patterns. The warp or stress thus caused may bring about a problem of variation in operation characteristics of the elements. If the elements are field-effect transistors, the variation in operation characteristics signifies variation in threshold voltage, variation in drain current or increase in leakage current. In this specification, an influence of the substrate stress on the operation characteristics is called a stress effect.